The invention relates to a vertically integrated component, to a component array and to a method for fabricating a vertically integrated component.
With ongoing miniaturization, conventional silicon microelectronics will reach its limits. In particular, the development of increasingly small and densely arranged transistors of by now several hundred million transistors per chip will be subject to fundamental physical problems and restrictions within the next ten years. When structure sizes drop below approximately 80 nm, the components are disruptively influenced by quantum effects, which are dominant at dimensions of below approximately 30 nm. The increasing integration density of the components on a chip also leads to a dramatic rise in the waste heat.
Nanostructures, such as for example nanotubes, in particular carbon nanotubes, and nanorods, also known as nanowires, are known to be a possible successor technology to conventional semiconductor electronics.
By way of example, Harris, P J F (1999) “Carbon Nanotubes and Related Structures—New Materials for the Twenty-first Century,” Cambridge University Press, Cambridge, pp. 1 to 15, 111 to 155 gives an overview of the technology of carbon nanotubes. A carbon nanotube is a single-walled or multiwalled tube-like carbon compound. In the case of multi-walled nanotubes, at least one inner nanotube is coaxially surrounded by an outer nanotube. Single-walled nanotubes typically have diameters of 1 nm, while the length of a nanotube may be several hundred nm. The ends of a nanotube are often terminated by in each case half a fullerene molecule. Nanotubes can be produced by depositing a layer of catalyst material, for example of iron, cobalt or nickel, on a substrate and growing carbon nanotubes on the catalyst material layer using a CVD (chemical vapor deposition) process by introducing a carbon-containing material (for example acetylene) into the process chamber. On account of the good electrical conductivity of carbon nanotubes and on account of the ability to adjust this conductivity, for example by the application of an external electrical field or by doping the nanotubes, for example with potassium, nanotubes are suitable for a wide range of applications, including electrical coupling technology in integrated circuits, for components used in microelectronics and as electron emitters.
Field-effect transistors are required for many integrated components used in silicon microelectronics. A carbon nanotube can be used to form a field-effect transistor of this type, resulting in the formation of what is known as a CNT-FET (carbon nanotube field-effect transistor). For this purpose, by way of example, a nanotube is formed in planar form on a dielectric layer on a conductive substrate and contact-connected. The conductivity of the carbon nanotube is controlled by a suitable electric voltage applied to the conductive substrate, so that the flow of electric current through the nanotube, that is, the flow of electric current between the source/drain terminals of the CNT-FET, can be controlled by applying a voltage to the conductive substrate.
A method for forming a field-effect transistor using a carbon nanotube is described, for example, in Derycke, V, Martel, R, Appenzeller, J, Avouris, P (2001) “Carbon Nanotube Inter- and Intramolecular Logic Gates”, Nanoletters 1(9): 453-456, (the “Derycke reference”). According to the method described in the Derycke reference, first of all a silicon dioxide layer is formed on a silicon substrate, and then contact-connection pads are formed on the silicon dioxide layer. Then, a carbon nanotube is applied between two contact-connection pads and contact-connected to the contact-connection pads, it being possible to control the conductivity of the carbon nanotube by applying a voltage to the silicon substrate. The level of the flow of electric current between the two end portions of a carbon nanotube, for a predetermined electric voltage, is dependent on the conductivity of the carbon nanotube and can therefore be controlled by means of the electric voltage at the silicon substrate.
Furthermore, it is known from the Derycke reference to produce a semiconducting carbon nanotube of optionally the p-conduction type or the n-conduction type. When forming a carbon nanotube in the conventional way, the nanotube is often obtained in the p-conduction state. A carbon nanotube of the p-conduction type can be converted into a carbon nanotube of the n-conduction type by conditioning in vacuo or by doping with potassium ions.
However, the method which is known from the Derycke reference has the drawback that it is only possible to fabricate planar, horizontally oriented nanotubes on a substrate. A carbon nanotube field-effect transistor with a nanotube formed horizontally on a substrate, however, has the drawback that a component of this type takes up a large amount of space on the surface of a substrate, and consequently the integration density of components, for example carbon nanotube field-effect transistors, on a substrate is low.
Nanorods, also known as nanowires, are also used as an alternative to nanotubes, for example to carbon nanotubes, as nanostructures for an integrated circuit. By way of example, it is known from Johnson, J C, Yan, H, Schaller, R D, Haber, L H, Saykally, R J, Yang, P (2001) “Single Nanowire Lasers” J. Phys. Chem. B, 105, 11387, 2001,(the “Johnson reference”), to form a tuft of vertical zinc oxide nanowires on a gold catalyst which has been applied to a sapphire substrate. It is in this way possible to produce protruding zinc oxide nanowires with diameters of approximately 40 nm to 150 nm and a density of approximately 103 wires per cm2. According to the concept which is known from the Johnson reference, tufts of zinc oxide nanowires are used as laser components.
Furthermore, it is known from Huang, Y, Duan, X, Cui, Y, Lauhon, L J, Kim, K H, Lieber, C M (2001) “Logic Gates and Computation from Assembled Nanowire Building Blocks,” Science 294: 1313-1317, (the “Huang reference”), to produce field-effect transistors and logic gates from horizontal, crossed nanowires of p-doped silicon and n-doped gallium nitride formed on a substrate surface.
However, the nanowires described in the Huang reference are only formed in planar form in the horizontal direction on a substrate surface and contact-connected. Since consequently the dimension of a component obtained is determined by the length of a nanostructure (of the order of magnitude of micrometers), the method which is known from the Huang reference is contradictory to the requirement for ongoing miniaturization.
It is known from DE 100 36 897 C1 to introduce a via hole into a thick gate electrode layer and to grow a vertical nanoelement therein. This results in a vertical field-effect transistor with the nanoelement as channel region, it being possible to control the electrical conductivity of the channel region by means of the gate electrode region which surrounds the nanoelement along approximately its entire longitudinal extent.
US 2002/0001905 A1 discloses a vertical nano-dimensional transistor using carbon nanotubes, and a method for fabricating this transistor.
Choi, W B, Chu, J U, Jeong, K S, Bae, E J, Lee, J W, Kim, J J, Lee, J O (2001) “Ultrahigh-density nanotransistors by using selectively grown vertical carbon nanotubes” Applied Physics Letters, Vol. 79, No. 22, 3696-3698 describes ultrahigh-density nanotransistors using selectively grown vertical carbon nanotubes.
WO 01/61753 A1 discloses an electronic component having an electrically conductive compound formed from carbon nanotubes, and methods for fabricating it.